The invention relates in general to flash memory devices and, more particularly, to a method of fabricating a flash memory device in which transistors of a peripheral region are protected by using a nitride-containing film.
In general, in fabricating a flash memory device, a gate etch process is performed by using a cell target having a high density in order to define the cell region and the peripheral region. In this case, since the respective densities of transistors formed in the cell region and the peripheral region differ, there is a loading difference in the gate etch process. If the gate is etched so that bridges are not generated in the floating gate of the cell region, the tunnel oxide film of the peripheral region is damaged. The tunnel oxide film is damaged by plasma because the transistor of the peripheral region has a density relatively lower than that of the transistor of the cell region. This defect greatly changes the characteristics of the transistor. For example, in the case of an NMOS transistor, conductance (Gm) is lower and hot carrier injection (HCI) is further accelerated, further reducing a hot carrier maintenance time. Accordingly, an efficient channel length cannot be secured since the range of the drain is expanded. This phenomenon also occurs in a PMOS transistor, resulting in a leakage current occurring in an ion junction portion of the device.